-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Dec 28 03:29:56 2021 UTC
-- File 20210829_001133_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-29T00:11:36.000.000.000 to 2021-08-29T00:11:36.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210829_001133_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  001C9FA0 01096830 02C6EE10 02D2CC80 01DDD560 03333FD0 00AAA030 00FFF020 02800830 03C00C20 00200A30
      00200A30 00300F20 022808B0 033C0CE0 02510540 03BCC3F0 0262A200 0353F300 02FA0A80 03870FC0 02448820
      02448820 0166CC30 01D5AA20 033F7F30 02A0C0A0 00F85070 00423C20 02632230 0352B320 00FBEAB0 00861FE0
      00861FE0 02C51010 01A79810 03745410 00CE7E10 02A94110 02FEF0C0 03C0C450 0020A670 0030F540 00288FE0
      00288FE0 023CC810 0122AC10 03B3FA10 006A0710 025F0490 017086D0 01E462D0 018B29D0 034EBD30 02E9E3A0
      02E9E3A0 019D1270 01539B40 01FA56E0 03077D90 0084C350 02C6A2F0 03A5F380 013B8520 01D323D0 033AB230
      033AB230 02A7EB20 01F41EB0 010E11E0 03891910 004D9590 026B5F50 015EF0F0 01F18880 0084A660 03637AA0
      03637AA0 00D2C7F0 00BBA400 00E67600 00954D00 00DFEB80 00B01E40 00E81160 029C19D0 01D21530 029D8FD0
      029D8FD0 00E9A410 029D7610 01D3CD10 033A2B90 00A73E50 02F4A170 038EF1C0 02498920 016D4DB0 01DBEB60
      01DBEB60 039B0F60 022B4460
     
