-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Dec 26 16:47:12 2021 UTC
-- File 20210827_102823_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-27T10:28:26.000.000.000 to 2021-08-27T10:28:26.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210827_102823_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00E99160 029D59D0 01D3F530 013A0FA0 01D38430 029D2310 02E9D940 03CE9AF0 0229D780 033D3C40 02A3A260
      02A3A260 01F27350 030B4AF0 028EEF80 03C99840 022D5460 013BFE50 01D300B0 029D4070 03D3E040 023A1060
      023A1060 01271850 03B49470 026EDE40 0359B160 00F569D0 028FDD30 03C833A0 00161530 020E8FD0 0109C830
      0109C830 018D2C20 034BBA30 02EE6720 019954B0 0155FEE0 03FF0190 00008150 0200C1F0 01805080 00A03C60
      00A03C60 02F02250 01883370 014C2AC0 01EA3FA0 031F2070 0290B040 03D8E860 00349C50 022ED270 019CDDA0
      019CDDA0 01A959B0 017DF560 03C30FD0 00228830 0033CC20 022A2A30 033F3F20 00A0A0B0 00F0F0E0 02888890
      02888890 02E66660 02CAAAA0 01AFFFF0 01780000 01C40000 01260000 01B50000 016F8000 01D84000 01346000
      01346000 01AE5000 00BCBC00 00717100 0049C980 006D2D40 005BBBE0 02766610 014D5510 03EBFF90 001E0050
      001E0050 02110070 03198040 034AA030 0377F810 00CC0410 02AA0610 01FF0510 03008790 0080C450 02C0A670
      02C0A670 03A0F540 02708FE0
     
