-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Dec 26 16:19:42 2021 UTC
-- File 20210827_101227_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-27T10:12:30.000.000.000 to 2021-08-27T10:12:30.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210827_101227_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0375A7E0 00CF7410 02A8CE10 02FE5480 01C0BF60 03907060 022C2420 009D1B10 02D39690 01BA5DD0 03677330
      03677330 02D4CAA0 01BEAFF0 0161F800 01D10400 01398600 01A54500 00BBF3C0 02730510 014A8790 03EFC450
      03EFC450 00182670 00143540 001E2FE0 02113810 0119A410 03957610 005FCD10 033815C0 03520F90 00FB0850
      00FB0850 02868C70 03C5CA40 02272F60 0134B8D0 03AEE4B0 027996E0 01455D90 03E7F350 000A0570 000783E0
      000783E0 02044210 01066310 03855290 0047FBD0 02640630 03560520 00FD07B0 00838460 02C24650 00D1B2B0
      00D1B2B0 025CB5F0 0372EF00 02CB9880 03AE54C0 02797EA0 0145C1F0 01E72100 0114B180 019EE940 01519DE0
      01519DE0 03FCA980 01017EA0 0381C1F0 02412100 0361B180 02D16940 03B9DDE0 00653310 0257AA90 017C7FD0
      017C7FD0 03C24030 0311B010 024CB400 036AEE00 02DF9900 03B05580 02687F40 035C40E0 00F26090 028B50D0
      028B50D0 01CEF8B0 012984E0 03DEA340 0318F970 029485C0 03DEC720 0031A4B0 002976E0 023DCD90 01232B50
      01232B50 03B2BEF0 026BE180
     
