-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Dec 26 13:58:25 2021 UTC
-- File 20210827_081019_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-27T08:10:22.000.000.000 to 2021-08-27T08:10:22.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210827_081019_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00E0CAE0 0290AF90 01D8F850 03348470 02AEC640 03F9A560 000577D0 0103E610 03C10A80 0110C7E0 03CC5200
      03CC5200 022A7B00 033F4680 02A0E5C0 03F09720 0008DCB0 000CB2E0 020AEB90 010F9E50 03885170 01263CE0
      01263CE0 03DA9140 0237D9E0 012C3510 03BA2F90 00673850 0254A470 037EF640 02C18D60 01A14BD0 0371EE30
      0371EE30 03648C90 026B6560 015ED7D0 03F1BC30 02096220 010DD330 018B3AA0 034EA7F0 02E9F400 039D0E00
      039D0E00 02538900 01BD26C0 02B1DAD0 01E937B0 011DAC60 03937A50 005AC770 0077A4C0 004C76A0 026A4DF0
      026A4DF0 035F6B00 02F0DE80 01C458E0 03933A40 025AA760 0177F4D0 03CC0EB0 022A09E0 013F0D10 03A08B90
      03A08B90 0070CE50 0248A970 036CFDC0 036D4190 026DF0A0 015B08F0 01F68C80 010DCAC0 018B2FA0 034EB870
      034EB870 02E9E440 039D1660 00539D50 027A53F0 01A3BD00 00B931C0 00E5A920 02977DB0 03DCC360 0032A2D0
      0032A2D0 022BF3B0 033E0A60 00A10F50 02F188F0 03894C80 0126F560 03DAC7E0 0037A410 022C7610 013A4D10
      013A4D10 03A76B90 0074DE50
     
