-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Dec 26 13:03:35 2021 UTC
-- File 20210827_072432_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-27T07:24:35.000.000.000 to 2021-08-27T07:24:35.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210827_072432_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00FF0100 00808180 00C0C140 00A0A1E0 02F0F110 01888990 034CCD50 007555F0 0027FF80 001A0020 010B8010
      010B8010 038E4010 00496010 026DD010 015B3810 03F6A410 000DF610 020B0D10 010E8B90 0389CE50 002694B0
      002694B0 021AEF70 031798C0 029C54A0 01D27EF0 013B4180 01A6E140 017591E0 03CF5910 0028F590 023C8F50
      023C8F50 00916470 006CEB20 025A9EB0 0377D1E0 00CC3910 02AA2590 01FF3750 0300ACF0 0280FA80 03C087C0
      03C087C0 0220C420 00985310 036A3D40 02DF23E0 01B0B210 0368EB10 00DC9E90 02B2D1D0 01EBB930 011E65A0
      011E65A0 03915770 0259FCC0 03BA8150 0033E0F0 002A1080 003F18C0 002094A0 0230DEF0 0328B180 02BCE940
      02BCE940 03E29DE0 0013D310 021A3A90 028B93E0 02E72D00 0394BB80 025EE640 03719560 00C95FD0 02ADF030
      02ADF030 03FB0820 00068C30 0005CA20 02072F30 03825C50 0021B930 003165A0 0229D770 033D3CC0 02A3A2A0
      02A3A2A0 01F273F0 010B4A00 018EEF00 01499880 01ED54C0 028DFF50 00E58070 00974040 00DCE060 02B29050
      02B29050 01EBD870 011E3440
     
