-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Dec 25 05:06:08 2021 UTC
-- File 20210826_083132_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-26T08:31:35.000.000.000 to 2021-08-26T08:31:35.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210826_083132_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  033DBB90 00A36650 02F2D570 01C5DFE0 03939800 025A5400 03777E00 02CCC100 03AAA180 027FF140 034009E0
      034009E0 00E00D10 02900B90 01D80E50 019A04B0 02AB8370 03FE42C0 020163A0 0101D270 01813B40 0141A6E0
      0141A6E0 03E17590 0011CF50 021928F0 0315BC80 014FB160 03F434E0 000E2E90 020939D0 010DA530 018B77A0
      018B77A0 034ECC70 02E9AA40 039D7F60 0053C0D0 027A20B0 03A39870 01392A20 03A5BF30 027760A0 014CD0F0
      014CD0F0 01EAB880 011FE4C0 019016A0 03581DF0 02F41300 038E1A80 01248BE0 03DB6700 0236D480 032DBEC0
      032DBEC0 02BB61A0 01E6D170 0115B9C0 019F6520 0350D7B0 02F8BC60 0184E250 01A349B0 02B976B0 03E5CDE0
      03E5CDE0 00172B10 021CBE90 0112E1D0 039B9130 025659A0 017D7570 01C3CFC0 01222820 01D99E10 039AA880
      039AA880 0257FCC0 037C02A0 00C203F0 00A30200 00F28300 008BC280 00CE23C0 00A93220 02FDAB30 03C1BF50
      03C1BF50 0010B070 0018E840 00149C60 021ED250 0111BB70 019966C0 0155D5A0 03FF3F70 0200A0C0 0300F0A0
      0300F0A0 00404470 00303320
     
