-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Dec 17 23:29:41 2021 UTC
-- File 20210815_215919_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-15T21:59:22.000.000.000 to 2021-08-15T21:59:22.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210815_215919_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  013A5AA0 03A777F0 0274CC00 034EAA00 02E9FF00 039D0080 0129C060 03DE9020 0018EC10 030A4D00 0147B5C0
      0147B5C0 01E46F20 031658B0 029D74E0 01D3CE90 033A29D0 00A73D30 00F4A3A0 028EF270 03C98B40 0316A770
      0316A770 014EFA60 03E98750 001D44F0 0013E680 001A15C0 00171F20 021C90B0 0312D8E0 009BB490 02D66ED0
      02D66ED0 00DEACD0 0158FD50 03F483F0 020EC200 0309A300 028D7280 03CBCBC0 022E2E20 01393930 01A5A5A0
      01A5A5A0 03777770 01666660 03EAAAA0 001FFFF0 00100000 00180000 00140000 001E0000 00110000 00198000
      00198000 00154000 001FE000 00080800 00060600 00050500 00078780 00044440 00066660 02055550 0107FFF0
      0107FFF0 01840000 01460000 01E50000 008BC000 00671000 00549800 007ED400 0041BE00 00616100 0051D180
      0051D180 00793940 0045A5E0 02677710 0154CC90 03FF5560 02007FE0 01004010 03806010 00405010 02607810
      02607810 01504410 03F86610 00045510 02067F90 01054050 01C3F030 02910410 01D98610 03354510 00AFE790
      00AFE790 02F81450 01841E70
     
