-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Dec 17 10:47:29 2021 UTC
-- File 20210815_125311_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-15T12:53:14.000.000.000 to 2021-08-15T12:53:14.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210815_125311_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02666AE0 01555F90 03FFF050 00000870 00000C40 00000A60 02000F50 010008F0 00C00640 025002B0 03BC01F0
      03BC01F0 02620100 03530180 02FA8140 0387C1E0 00442110 02663190 01552950 03FFBDF0 02006300 01802940
      01802940 02A01EF0 03F01180 02081940 030C15E0 008A1F10 02CF1090 01A898D0 037CD4B0 02C2BEE0 01A3E190
      01A3E190 03B908A0 0032C670 002BA540 003E77E0 02214C10 0131EA10 03A91F10 007D9090 024358D0 0162F4B0
      0162F4B0 01D38EE0 039D24C0 0329DB50 00BD36F0 00E3AD80 00927B40 00DB46E0 02B6E590 01ED9750 031B5CF0
      031B5CF0 0296F280 03DD8BC0 0319A710 024ABA40 036FE760 00D814D0 02B41EB0 03EE11E0 00191910 02159590
      02159590 011F5F50 0390F0F0 02588880 01BA6660 03B3AAA0 006A7FF0 005F4000 0070E000 00489000 006CD800
      006CD800 005AB400 0077EE00 004C1900 006A1580 002F8FA0 011C2430 01923620 035B2D30 02F6BBA0 018DE670
      018DE670 014B1540 01EE9FE0 0319D010 00953810 02DFA410 02D83B00 01DA1340 01371AE0 03AC9790 007ADC50
      007ADC50 0247B270 03646B40
     
