-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Dec 16 04:06:14 2021 UTC
-- File 20210814_145528_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-14T14:55:31.000.000.000 to 2021-08-14T14:55:31.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210814_145528_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01AE4F50 037968F0 02C5DC80 03A732C0 0274ABA0 014EFE70 01E98140 011D41E0 0393E110 005A1190 02771950
      02771950 014C95F0 00F56F80 008FD840 00C83460 02AC2E50 01FA3970 010725C0 0184B720 0346ECB0 02E59AE0
      02E59AE0 01975790 03AE7E20 003CA090 0222F0D0 013388B0 01AA4CE0 037F6A90 00C0DFD0 02A0B030 03F0E820
      03F0E820 00089C30 000CD220 01055D90 03C3F9A0 00220570 003307C0 002A8420 023FC630 03202520 00B037B0
      00B037B0 00E82C60 029C3A50 01D22770 009D9A60 0369ABA0 00DD7E70 00B3C140 00EA21E0 029F3110 01D0A990
      01D0A990 0338FD50 00A483F0 00F6C200 008DA300 0065B940 022BB2F0 033E6B80 02A15E40 03F1F160 000909D0
      000909D0 020D8D30 030B4BA0 008EEE70 00C99940 00AD55E0 037DFF80 01618020 03D14030 0239E020 01251030
      01251030 01B79820 036C5430 02DA7E20 01B74130 016CE1A0 03DA9170 011BECE0 03CB0D40 022E8BE0 0139CE10
      0139CE10 03A52910 0077BD90 024C6350 016A52F0 01DF7B80 0130C640 01A8A560 03BE7BE0 0230A300 0328F280
      0328F280 02BC8BC0 03E2CE20
     
