-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Dec 15 04:56:03 2021 UTC
-- File 20210814_010804_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-14T01:08:07.000.000.000 to 2021-08-14T01:08:07.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210814_010804_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0027D1C0 021A1C90 028B8960 02E726E0 0194B590 035EEF50 00F198F0 00895480 00CDFEC0 00AB01A0 02FE8170
      02FE8170 0381C1C0 02412120 00B0D8D0 01745A50 03CE7770 02294CC0 033DEAA0 00A31FF0 00F29000 008BD800
      008BD800 00CE3400 00A92E00 00FDB900 0041B2C0 0230B5D0 0128EF30 01BC98A0 0362D4F0 02D3BE80 03BA61C0
      03BA61C0 02675120 0154F9B0 01FE8560 0301C7D0 00409210 03306D80 02A85B40 03FC76E0 00024D90 02036B50
      02036B50 0102DEF0 0183B180 01426940 01E35DE0 0312F310 024DC540 03B593F0 026F5A00 0358F700 02F48C80
      02F48C80 038ECAC0 0249AFA0 016D7870 01DBC440 01362660 03AD3550 003DD7F0 00119E00 00195100 0015F980
      0015F980 001F0540 001087E0 0218C410 0114A610 039EF510 00518F90 02794850 00A2F630 0279C690 014525D0
      014525D0 03E7B730 02146CA0 011E5AF0 01917780 0159CC40 01F52A60 030FBF50 008860F0 00662840 022A9E30
      022A9E30 033FD120 00A039B0 00F02560 028837D0 01CC2C30 012A3A20 03BF2730 0260B4A0 0150EEF0 00FC4CC0
      00FC4CC0 02413550 0161AFF0
     
