-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Dec 12 19:24:50 2021 UTC
-- File 20210812_033029_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-12T03:30:32.000.000.000 to 2021-08-12T03:30:32.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210812_033029_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03D05C90 003872D0 02244BB0 03366E60 0256ACA0 00BEFD70 00E183C0 00914220 02D9E330 03B512A0 006F9BF0
      006F9BF0 00585600 00747D00 004E4380 00696240 022EE9B0 039CCEB0 0252A9E0 017BFD10 03C60390 00250250
      00250250 02378370 032C42C0 02BA63A0 01E75270 0114FB40 02CF4370 01D47160 033E49D0 00A16D30 00F1DBA0
      00F1DBA0 02893670 03CDAD40 022B7BE0 013EC610 03A1A510 00717790 0324E620 005B4A90 0276EFD0 014D9830
      014D9830 01EB5420 031EFE30 02918120 01D941B0 0135E160 03AF11D0 00789930 02226AD0 0099AFD0 02D57830
      02D57830 03BFC420 00602630 00503520 02782FB0 03443860 00E62450 02953670 03DFAD40 03183DF0 014A1180
      014A1180 01EF1940 011895E0 0394DF10 005EB090 0271E8D0 01491CB0 01ED92E0 031B5B90 0096F650 016EC6B0
      016EC6B0 02ECD2F0 039ABB80 0257E640 037C1560 00C21FD0 02A31030 03F29820 000BD430 000E3E20 02092130
      02092130 0386D8D0 0022DA50 0233B770 032A6CC0 02BF5AA0 01E0F7F0 01108C00 0198CA00 0154AF00 01FEF880
      01FEF880 010184C0 02C0A350
     
