-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Dec 10 18:00:23 2021 UTC
-- File 20210809_101531_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-09T10:15:34.000.000.000 to 2021-08-09T10:15:34.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210809_101531_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00DE4CC0 00B16AA0 0174EFF0 00E74C00 004A7500 0037A7C0 002C7420 023A4E30 03276920 00B4DDB0 00EEB360
      00EEB360 0299EAD0 01D51FB0 013F9060 03A05850 00383A30 02121390 011B1A50 03969770 025DDCC0 037332A0
      037332A0 00CAABF0 00AFFE00 00F80100 00840180 00C60140 025280F0 01BDE040 01631060 03D29850 003BD470
      003BD470 00263E40 00352160 022FB1D0 01386930 01A45DA0 03767370 0166A560 03EAFBE0 001F8610 02104510
      02104510 01186790 03945450 005E7E70 00714140 0049E1E0 026D1110 015B9990 03FB2AA0 00035FF0 0002F000
      0002F000 00038800 00024C00 00036A00 0002DF00 0003B080 000268C0 00035CA0 0202F2F0 0181C5C0 02A09390
      02A09390 01F0DA50 0308B770 028CECC0 03CA9AA0 002FD7F0 00383C00 00242200 00363300 002D2A80 001DDFE0
      001DDFE0 03099800 028D5400 03CBFE00 022E0100 03390180 02A58140 03F741E0 000CE110 020A9190 010FD950
      010FD950 01C41AF0 00930BC0 00DA8E20 02B7C930 03EC2DA0 001A3B70 001726C0 001CB5A0 0212EF70 031B98C0
      031B98C0 029654A0 00EEBF70
     
