-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Dec  5 18:38:05 2021 UTC
-- File 20210803_065024_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-03T06:50:27.000.000.000 to 2021-08-03T06:50:27.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210803_065024_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02E30740 039284E0 005BC690 027625D0 014D3730 01EBACA0 031E7AF0 02914780 03D9E440 02351660 012F9D50
      012F9D50 03B853F0 02647A00 03564700 02FD6480 0383D6C0 03211ED0 0058C8D0 0274ACB0 034EFAE0 00E98790
      00E98790 029D4450 01D3E670 013A1540 01A71FE0 03749010 00CED810 0354DA00 017F5B80 01C0F640 01208D60
      01208D60 03B0CBD0 0068AE30 005CF920 027285B0 034BC760 00EE24D0 029936B0 03EAD6F0 010FDEC0 018831A0
      018831A0 034C2970 02EA3DC0 039F2320 0050B2B0 0078EBE0 02449E10 0166D110 03D5B990 021FB2A0 008835F0
      008835F0 00CC2F00 00AA3880 00FF24C0 0080B6A0 02C0EDF0 03A09B00 0270D680 0348BDC0 02ECE320 00CD4950
      00CD4950 0155F6F0 01FF0D80 01008B40 0180CEE0 0340A990 00E0FD50 029083F0 03D8C200 0234A300 032EF280
      032EF280 015CC5E0 03F95380 0205FA40 03070760 008484D0 02C6C6B0 03A5A5E0 00777710 024CCC90 016AAAD0
      016AAAD0 03DFFFB0 03180030 034A0010 00EF0010 02988010 01D4C010 033EA010 00A1F010 02F10810 01898C10
      01898C10 034D4A10 00EBEF10
     
