-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Dec  1 08:44:48 2021 UTC
-- File 20210730_114231_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-07-30T11:42:34.000.000.000 to 2021-07-30T11:42:34.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210730_114231_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  001A7500 00174F80 001CE840 00129C60 021BD250 01163B70 019D26C0 02A9DAD0 00FE9BD0 0140EB10 03F04F40
      03F04F40 020868E0 010C5C90 038A72D0 004F4BB0 0068EE60 025C9950 0172D5F0 01CBBF00 012E6080 00DCA860
      00DCA860 03597E20 00F5C130 008F21A0 02C8B170 03ACE9C0 027A9D20 0147D3B0 01E43A60 03162750 009D34F0
      009D34F0 0069D740 022E9E70 0339D140 02A539E0 01F7A510 030C7790 008A4C50 02CF6A70 03A8DF40 027CB0E0
      027CB0E0 0142E890 03F1CE60 020494A0 0106DEF0 0185B180 01476940 01E4DDE0 0316B310 009DEA90 02D31FD0
      02D31FD0 01BA9030 0167D820 01EA1A10 038F8B80 02484E40 036C6960 00DA5DD0 02B77330 03ECCAA0 001AAFF0
      001AAFF0 0017F800 001C0400 00120600 000D8280 0005A1E0 02077110 0104C990 0386AD50 0045FBF0 00670600
      00670600 00548500 007EC780 0041A440 00617660 0328E6A0 005E4AF0 00716F80 0049D840 006D3460 025BAE50
      025BAE50 01767970 01CD45C0 012BE720 03BE14B0 02611EE0 02A8C8C0 03FE5650 00017D70 0001C3C0 00012220
      00012220 0201B330 03016AA0
     
