-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Nov 24 15:03:36 2021 UTC
-- File 20210723_222401_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-07-23T22:24:04.000.000.000 to 2021-07-23T22:24:04.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210723_222401_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02B729B0 03ECBD60 001AE3D0 02179230 031C5B20 009276B0 00DB4DE0 02B6EB10 01ED9E90 038DA8E0 0225BE40
      0225BE40 039BB0B0 025668E0 017D5C90 03C3F2D0 00220BB0 00330E60 022A8950 013FCDF0 01A02B00 01703E80
      01703E80 00E410E0 034B0C40 02EE8A60 0199CF50 035528F0 02FFBC80 038062C0 024053A0 01607A70 01D04740
      01D04740 013864E0 03D22B40 031D9F70 029350C0 03DAF8A0 003784F0 002C4680 003A65C0 00275720 0234FCB0
      0234FCB0 032E82E0 00B9C390 03729120 0065ECD0 02571AB0 037C97E0 00C2DC10 02A3B210 01F26B10 030B5E90
      030B5E90 008EF1D0 02C98930 03AD4DA0 003DF5B0 021187B0 03194460 0095E650 02DF1570 03B09FC0 0268D020
      0268D020 015CB830 01F2E420 030B9630 028E5D20 00E4B9D0 014B7290 03EECBD0 0019AE30 00157920 021FC5B0
      021FC5B0 03102760 009834D0 02D42EB0 03BE39E0 00612510 0328DBC0 035E5B10 00F17690 0289CDD0 01CD2B30
      01CD2B30 012BBEA0 03BE61F0 02615100 0351F980 02F90540 038587E0 0223A200 01993980 0155A540 01FF77E0
      01FF77E0 0300CC10 0080AA10
     
