-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Nov 24 02:08:46 2021 UTC
-- File 20210723_012153_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-07-23T01:21:56.000.000.000 to 2021-07-23T01:21:56.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210723_012153_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0149A750 03ED74F0 021BCE80 031629C0 034E9E90 00E9D1D0 029D3930 03D3A5A0 003A7770 00274CC0 0034EAA0
      0034EAA0 022E9FF0 0339D000 02A53800 01FBD200 00831D80 00C29340 00A3DAE0 02F23790 018B2C50 034EBA70
      034EBA70 02E9E740 039D14E0 00539E90 027A51D0 00A3BC90 03793160 00C5A9D0 02A77D30 03F4C3A0 000EA270
      000EA270 0009F340 000D0AE0 020B8F90 010E4850 03896C70 0126ED20 01DACDD0 0337AB30 02AC7EA0 01FA41F0
      01FA41F0 01076100 0184D180 0146B940 01E5E5E0 03171710 009C9C90 03696960 026EEEE0 01599990 03F55550
      03F55550 000FFFF0 00080000 000C0000 000A0000 000F0000 00088000 000CC000 00055000 0003FC00 00020200
      00020200 00030300 00028280 0003C3C0 00022220 02033330 0302AAA0 0083FFF0 00C20000 00518000 003CA000
      003CA000 0022F000 00338800 002A4C00 003F6A00 0020DF00 0030B080 0028E8C0 003C9CA0 0222D2F0 0199DDC0
      0199DDC0 02AA9990 01FFD550 03003FF0 02802000 03C03000 02202800 03303C00 02A82200 03FC3300 02022A80
      02022A80 01819FE0 03A0A800
     
