-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Nov 14 19:27:23 2021 UTC
-- File 20210714_192753_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-07-14T19:27:56.000.000.000 to 2021-07-14T19:27:56.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210714_192753_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00EFFF70 009800C0 00D400A0 02BE00F0 01F08040 0108C060 038CA050 004AF070 006F8840 00584C60 02746A50
      02746A50 014E5F70 01E970C0 011DC8A0 01C99670 0096AEA0 02DDF9F0 03B30500 026A8780 035FC440 02F02660
      02F02660 01883550 034C2FF0 02EA3800 039F2400 01285B00 00DE3B40 00B126E0 02E9B590 019D6F50 0353D8F0
      0353D8F0 02FA3480 03872EC0 0244B9A0 0166E570 01D597C0 029FAE10 02E83C80 039C22C0 025233A0 017B2A70
      017B2A70 01C6BF40 0125E0E0 03B71090 006C98D0 025AD4B0 0377BEE0 026630C0 03AA9450 007FDE70 00403140
      00403140 006029E0 02503D10 01782390 03C43250 00262B70 00353EC0 002FA1A0 011C38B0 02C91270 03AD9B40
      03AD9B40 027B56E0 0146FD90 03E58350 001742F0 001CE380 00129240 001BDB60 021636D0 008E96D0 0164EED0
      0164EED0 03D699B0 023DD560 01233FD0 03B2A030 026BF020 015E0830 01F10C20 03098A30 028D4F20 00E5F450
      00E5F450 014B8730 01EE44A0 031966F0 0295D580 03DF3F40 0230A0E0 0128F090 03BC88D0 0062CCB0 0053AAE0
      0053AAE0 033D3FC0 0351D010
     
