-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Nov 12 06:33:17 2021 UTC
-- File 20210712_082550_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-07-12T08:25:53.000.000.000 to 2021-07-12T08:25:53.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210712_082550_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00DEFC80 00B182C0 00E943A0 029DE270 03D31340 023A9AE0 0127D790 03B43C50 006E2270 002C99A0 011D6AB0
      011D6AB0 02C9EFF0 03AD1800 027B9400 03465E00 02E57100 0397C980 025C2D40 03723BE0 00CB2610 02AEB510
      02AEB510 02FCF7C0 03C14610 0021E510 02311790 01299C50 03BD5270 0263FB40 035206E0 00FB0590 02868750
      02868750 01C5C4F0 00939340 026D2D70 035BBBC0 02F66620 018D5530 014BFFA0 03EE0070 02190040 03158060
      03158060 009F4050 02D0E070 01DC4820 01993610 0355AD10 00FF7B90 0280C650 01C0A570 0120F7C0 01B08C20
      01B08C20 0368CA30 02DCAF20 01B2F8B0 02B5C270 01F791A0 030C5970 028A75C0 03CF4F20 0028E8B0 003C9CE0
      003C9CE0 0222D290 0133BBD0 03AA6630 027F5520 00A07FD0 01782010 03C43010 00262810 02353C10 012FA210
      012FA210 03B87310 00644A90 02566FD0 017D5830 01C3F420 01910710 03ACC240 027AA360 0147F2D0 03E40BB0
      03E40BB0 02160E60 011D0950 03938DF0 025A4B00 03776E80 02CCD9C0 03D55A90 021FFBE0 01100610 03980510
      03980510 00540790 027E0450
     
