-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Nov 12 04:41:09 2021 UTC
-- File 20210712_051748_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-07-12T05:17:51.000.000.000 to 2021-07-12T05:17:51.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210712_051748_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  032DEA50 00BB1F70 00E690C0 0095D8A0 02DF34F0 03B0AE80 0268F9C0 035C8520 00F2C7B0 008BA460 02CE7650
      02CE7650 01A94D70 00BEF5E0 02E18F10 01914890 0359ECD0 00F51AB0 008F97E0 02C85C10 01AC7210 037A4B10
      037A4B10 00C76E90 03526CE0 027DAD40 03437BE0 00E2C610 0293A510 01DA7790 03374C50 00ACEA70 00FA9F40
      00FA9F40 0087D0E0 02C43890 02D31260 02DD4DA0 01B3EB70 016A1EC0 01DF11A0 03309970 02A8D5C0 03FCBF20
      03FCBF20 0002E0B0 000390E0 02025890 0281BA60 02E0B3A0 0190EA70 01589F40 01F4D0E0 030EB890 0089E4D0
      0089E4D0 02CD16B0 03AB9DE0 007E5310 02417A90 02B0E3E0 02F44900 038E6D80 02495B40 036DF6E0 00DB0D90
      00DB0D90 02B68B50 01EDCEF0 011B2980 0196BD40 015DE3E0 03F98900 0102A6C0 0183F5A0 03420F70 02E308C0
      02E308C0 03928CA0 005BCAF0 00762F80 004D3840 006BA460 025E7650 00B8A6B0 02727AF0 034B4780 02EEE440
      02EEE440 03999660 00555D50 027FF3F0 03400A00 02E00F00 03900880 02580CC0 03BA0550 003383F0 002A4200
      002A4200 003F6300 0020D280
     
