-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Nov 11 18:42:21 2021 UTC
-- File 20210711_192926_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-07-11T19:29:29.000.000.000 to 2021-07-11T19:29:29.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210711_192926_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01CC0960 032A0DD0 00BF0B30 00E08EA0 0290C9F0 03D8AD00 0234FB80 032E8640 02B9C560 01E527D0 0317B430
      0317B430 034E3710 02749640 034EDD60 00E9B3D0 029D6A30 03D3DF20 003A30B0 002728E0 0234BC90 012EE2D0
      012EE2D0 03B993B0 0332AD30 0355FDD0 00FF0330 008082A0 02C0C3F0 03A0A200 0270F300 03488A80 02ECCFC0
      02ECCFC0 039AA820 0057FC30 023E0110 029080C0 03D8C0A0 0034A0F0 002EF080 003988C0 00254CA0 0237EAF0
      0237EAF0 032C1F80 02BA1040 03E71860 020A4A20 0087B790 02C46C50 01A65A70 01757740 01CFCCE0 03282A90
      03282A90 00BC3FD0 02E22030 03933020 005AA830 023BFE10 02930080 03DA80C0 0237C0A0 012C20F0 01BA3080
      01BA3080 016728C0 01D4BCA0 033EE2F0 02A19380 03F15A40 0304FBB0 03434330 02E2E2A0 019393F0 015A5A00
      015A5A00 01F77700 010CCC80 018AAAC0 014FFFA0 03E80070 021C0040 03890030 0326C010 00B5A010 02EF7010
      02EF7010 0198C810 0354AC10 00FEFA10 02818710 01C14490 0321E6D0 00B115B0 0274CFB0 03A75430 0274FE20
      0274FE20 014E8130 01E9C1A0
     
