-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Nov 10 19:47:54 2021 UTC
-- File 20210710_150047_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-07-10T15:00:50.000.000.000 to 2021-07-10T15:00:50.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210710_150047_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  013EF4C0 02D0C750 00DC5270 00593DA0 0275A370 034F72C0 02E8CBA0 019CAE70 0152F940 01FB85E0 03064710
      03064710 00856490 02C7D6D0 00D21ED0 015D88D0 03F34CB0 020AEAE0 010F9F90 03885050 004C7870 006A4440
      006A4440 005F6660 0270D550 0148BFF0 00F67000 0046A400 0065F600 00570D00 007C8B80 0042CE40 0063A960
      0063A960 02527DD0 017B4330 01C6E2A0 032593F0 015BAD00 00FB3DC0 0086A320 02C5F2B0 03A70BE0 00748E10
      00748E10 024EC910 0169AD90 03DD7B50 0033C6F0 002A2580 001F9BA0 01082B30 018C3EA0 034A21F0 02EF3100
      02EF3100 0398A980 0254FD40 037E83E0 00C1C210 02A12310 01F1B290 0384B5E0 02237780 0332CC40 02ABAA60
      02ABAA60 01FE7F50 030140F0 0281E080 03C110C0 022198A0 013154F0 01A9FE80 00BE80E0 0370E040 02C89060
      02C89060 01ACD850 037AB470 02C7EE40 03A41960 007615D0 024D1F30 036B90A0 00DE58F0 0058BA40 023A73B0
      023A73B0 03274A60 00B4EF50 02EE98F0 0399D480 02553EC0 037FA1A0 00C07170 00A049C0 00F06D20 01442DD0
      01442DD0 01F31D90 030A9350
     
