-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Jul 19 20:20:24 2021 UTC
-- File 20210627_123724_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-06-27T12:37:24.000.000.000 to 2021-06-27T12:37:24.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210627_123724_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02E8F4C0 03CE4750 0014B270 000F75A0 0208CF70 030CA8C0 028AFCA0 01CF82F0 01284380 01BC6240 01625360
      01625360 03D37AD0 003AC7B0 0213D230 038D1D90 004B9350 026E5AF0 03597780 02F5CC40 038F2A60 0048BF50
      0048BF50 026CE0F0 035A9080 02F7D8C0 03C61A50 00128BB0 001BCE60 02162950 011D3DF0 0193A300 015A7280
      015A7280 01F74BC0 010CEE20 038A9930 024FD5A0 00B41FB0 02770830 034C8C20 00EACA30 009FAF20 02D078B0
      02D078B0 03B844E0 00646690 025655D0 017D7F30 01C3C0A0 01911070 00ACCC20 02FAAA30 0387FF20 004400B0
      004400B0 006600E0 02550090 017F80D0 03C040B0 022060E0 01305090 03D43C60 021F1120 011099B0 0198D560
      0198D560 0354BFD0 00FEE030 00819020 02C15830 03A1F420 00710E30 00498920 0136A6D0 01D6FAD0 033D87B0
      033D87B0 02A34460 01F2E650 030B9570 028E5FC0 03C97020 002DC830 003B2C20 0226BA30 039AF390 022BC520
      022BC520 013E27B0 01A13460 0371AE50 00C97970 00ADC5C0 00FB2720 0286B4B0 03C5EEE0 00271990 031A4AA0
      031A4AA0 004BB7F0 006E6C00
     
