-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Jul 19 15:43:57 2021 UTC
-- File 20210627_014025_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-06-27T01:40:25.000.000.000 to 2021-06-27T01:40:25.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210627_014025_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0008A270 000CF340 000A8AE0 0307E7C0 03420A10 02718780 01A4A220 01BB7990 0366C550 00D5A7F0 00BF7400
      00BF7400 00E0CE00 0090A900 00D8FD80 00B48340 00EEC2E0 0299A390 02EAB920 00CFF2D0 02A80BB0 03FC0E60
      03FC0E60 00020950 02030DF0 03028B00 0283CE80 03C229C0 02233D20 0132A3B0 02D5F930 03DF82D0 003043B0
      003043B0 00286260 023C5350 01227AF0 01B34780 016AE440 01DF9660 03305D50 00A873F0 007E2500 00209BC0
      00209BC0 0030D620 0228BD30 033CE3A0 00A29270 00F3DB40 008A36E0 02CF2D90 01A8BB50 037CE6F0 01614AC0
      01614AC0 02E8F7D0 019C8C30 0152CA20 03FBAF30 020678A0 010544F0 0187E680 014415C0 01E61F20 031510B0
      031510B0 034FCC70 01741520 03CE1FB0 02291060 013D9850 03A35470 0272FE40 034B8160 00EE41D0 02996130
      02996130 03D5D1A0 001F9CB0 02082970 030C3DC0 028A2320 01CF32B0 0128ABE0 03BCFE10 00628110 0253C190
      0253C190 017A2150 03C731F0 01125480 00CDBF60 02AB60D0 01FED0B0 0101B8E0 03816490 0041D6D0 02613DB0
      02613DB0 0351A360 00F972D0
     
