-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed May  5 16:13:11 2021 UTC
-- File 20210505_155458_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-05-05T15:55:01.000.000.000 to 2021-05-05T15:55:01.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210505_155458_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00000D00 000005C0 00000720 020004B0 030006E0 00800590 02C00750 01A004F0 01700680 01C805C0 012C0720
      012C0720 01DD0250 0199C1B0 01552160 03FFB1D0 00006930 00005DA0 02007370 03004AC0 02806FA0 01C05870
      01C05870 01207440 02D82730 03DA1A50 00371770 002C9CC0 003AD2A0 0227BBF0 03346600 02AE5500 03F97F80
      03F97F80 0205C040 03072060 02425820 00B1BA10 02E96710 019DD490 03533ED0 00FAA1B0 0087F160 02C409D0
      02C409D0 01A60D30 01750BA0 03CF8E70 011424A0 01CF1B70 012896C0 01BCDDA0 0362B370 02D3EAC0 03BA1FA0
      03BA1FA0 00671070 00549840 007ED460 0241BE50 00B0B0B0 02747470 034E4E40 02E96960 019DDDD0 03533330
      03533330 02FAAAA0 0187FFF0 01440000 01E60000 01150000 00CFC000 00541000 007E1800 00411400 00619E00
      00619E00 00515100 0079F980 00450540 006787E0 02544410 017E6610 03E0AA80 01087FE0 038C4010 004A6010
      004A6010 026F5010 0158F810 03F48410 000EC610 0209A510 010D7790 038BCC50 00271530 021A4FD0 01176830
      01176830 019CDC20 0352B230
     
