-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Oct  3 06:52:59 2024 UTC
-- File 20240827_200123_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-27T20:01:26.000.000.000 to 2024-08-27T20:01:26.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240827_200123_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02BF1D60 01E093D0 0310DA30 0298B720 00EA7650 014FA6B0 02F43AF0 01C713C0 02924D10 01DB6B90 0336DE50
      0336DE50 00ADB170 00FB69C0 0086DD20 02C5B3B0 03A76A60 0074DF50 024EB0F0 01B4F440 02B74730 03ECE4A0
      03ECE4A0 001A96F0 0017DD80 001C3340 00122AE0 021B3F90 0116A050 039DF070 02530840 03BD4630 0331F290
      0331F290 00A90BD0 02FD8E30 03834920 0042EDB0 00639B60 025256D0 017B7DB0 01C6C360 0325A2D0 005BB9D0
      005BB9D0 013B3290 03A6ABD0 0075FE30 004F0120 026881B0 035CC160 00F2A1D0 028BF130 03CE09A0 00290D70
      00290D70 001EC5E0 0308D380 028CBA40 03CAE760 002F94D0 02385EB0 032471E0 00B64910 02ED6D90 019BDB50
      019BDB50 035636F0 017E96C0 02E0EED0 019099B0 0158D560 03F4BFD0 000EE030 00099020 020D5830 030BF420
      030BF420 008E0E30 00C90920 0156C6D0 01FED2D0 0301BBB0 02816660 01C1D550 03213FF0 02B1A000 03E97000
      03E97000 021DC800 03132C00 029ABA00 01EBF380 008F0520 02C887B0 03ACC460 007AA650 0247F570 03640FC0
      03640FC0 02D60820 01BD0C30
     
