-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Oct  3 03:59:00 2024 UTC
-- File 20240827_054502_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-27T05:45:05.000.000.000 to 2024-08-27T05:45:05.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240827_054502_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01D86A10 03345F10 00AE7090 02F948D0 0185ECB0 01471AE0 03E49790 0016DC50 010ED930 02C4DAD0 00D35BD0
      00D35BD0 02BAF630 03E78D20 00144BB0 001E6E60 02115950 0119F5F0 01950F00 015F8880 01F04CC0 02843550
      02843550 00E317F0 00929C00 00DBD200 00B63B00 00ED2680 009BB5C0 00D66F20 02BD58B0 03E3F4E0 00120E90
      00120E90 030D84E0 0245A340 036772E0 00D4CB90 02BEAE50 01E1F970 011105C0 01998720 035544B0 02FFE6E0
      02FFE6E0 01801590 03A00FA0 00380430 00240620 02360530 032D07A0 00BB8470 00E64640 00956560 02DFD7D0
      02DFD7D0 01B03C30 01682220 01EE1990 038C8AA0 004ACFF0 006FA800 00587C00 00744200 004E6300 00695280
      00695280 005DFBC0 00730620 024A8530 03B7E3D0 00360910 022D0D90 013B8B50 03A64EF0 02756980 034FDD40
      034FDD40 02E833E0 019C2A10 03523F10 00FB2090 03435860 02717A20 0149C730 01ED24A0 031BB6F0 02966D80
      02966D80 03DD5B40 0233F6E0 012A0D90 03BF0B50 00608EF0 002864C0 021E2B50 01113EF0 0199A180 01557140
      01557140 01FFC9E0 03002D10
     
