-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Sep 23 01:30:01 2024 UTC
-- File 20240817_100842_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-17T10:08:45.000.000.000 to 2024-08-17T10:08:45.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240817_100842_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  000D24B0 000BB6E0 030736C0 034256D0 00E37DB0 0092C360 02DBA2D0 01B673B0 016D4A60 03DBEF50 003618F0
      003618F0 002D1480 003B9EC0 021328D0 008D5E50 02CBF170 03AE09C0 02790D20 01458BB0 01E74E60 0314E950
      0314E950 009E9DF0 00D1D300 00B93A80 0072D3E0 0325DD00 02B73380 03ECAA40 021AFF60 011780D0 039C40B0
      039C40B0 025260E0 017B5090 03C6F8D0 002584B0 021BA370 018B3960 034EA5D0 00E9F730 009D0CA0 02D38AF0
      02D38AF0 03BA4F80 02676840 0354DC60 00FEB250 0281EB70 01E08F60 03886460 004C5650 026A7D70 035F43C0
      035F43C0 02F0E220 01889330 014CDAA0 03EAB7F0 021FEC00 03101A00 014C0B80 00F50720 028F84B0 03C846E0
      03C846E0 002C6590 023A5750 01277CF0 01B4C280 016EA3C0 01D9F220 03350B30 0357C750 007E1270 00411B40
      00411B40 006196E0 02515D90 0179F350 03C50AF0 02278F80 03344840 02AE6C60 01F95A50 0182FBB0 02A1C330
      02A1C330 03F122A0 0009B3F0 000D6A00 000BDF00 000E3080 000928C0 000DBCA0 020B62F0 030ED380 0144DD20
      0144DD20 01F359D0 030AF530
     
