-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Sep 18 11:51:35 2024 UTC
-- File 20240816_111450_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-16T11:14:53.000.000.000 to 2024-08-16T11:14:53.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240816_111450_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02AB7D60 01FEC3D0 0301A230 02817320 01C1CAB0 01212FE0 03B1B810 00696410 025DD610 02B99E80 03E551C0
      03E551C0 0217F920 011C05B0 01920760 035B04D0 00F686B0 008DC5E0 02CB2710 01AEB490 03BCF760 02314660
      02314660 0129E550 03BD17F0 02639C00 03525200 02FB7B00 0386C680 0245A5C0 03677720 00D4CCB0 025F5570
      025F5570 01B87FE0 03644010 00D66010 02BD5010 01E3F810 03120410 009B0610 02D68510 01BDC790 03632450
      03632450 00695B30 022EFB50 013986F0 01A54580 0177E740 01CC14E0 032A1E90 00BF11D0 02E09930 0390D5A0
      0390D5A0 0058BF70 003A7060 0313A420 009A7630 00D74D20 02BCEBB0 03E29E60 0013D150 021A39F0 03172500
      03172500 029CB780 03D2EC40 031DCD30 034995D0 00ED5F30 009BF0A0 02D608F0 03BD0C80 02638AC0 03524FA0
      03524FA0 00FB6870 0086DC40 00C5B260 0353B5A0 007D37B0 0043AC60 02627A50 01534770 01FAE4C0 010796A0
      010796A0 03845DF0 02467300 03654A80 02D7EFC0 03DE0C10 02188500 0314C780 029EA440 03D1F660 00390D50
      00390D50 02258BF0 03374E00
     
