-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Sep 14 04:38:20 2024 UTC
-- File 20240810_045940_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-10T04:59:43.000.000.000 to 2024-08-10T04:59:43.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240810_045940_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00F98170 008541C0 00C7E120 02A411B0 03F61960 000D15D0 020B9F30 030E50A0 008978F0 00CDC480 00AB26C0
      00AB26C0 00FEB5A0 0281EF70 03C118C0 022194A0 0098AF70 00D4F8C0 00BE84A0 02E1C6F0 03912580 0259B740
      0259B740 03756CE0 00CFDA90 02A837D0 01FC2C30 02811D10 02E0C9C0 0390AD20 0058FBB0 00748660 024EC550
      024EC550 0169A7F0 01DD7400 0133CE00 01AA2900 017F3D80 00E051A0 01483CB0 01EC22E0 031A3390 00972A50
      00972A50 02DCBF70 03B2E0C0 026B90A0 015E58F0 01F17480 0109CEC0 02C694D0 00D2EF50 02BB98F0 03E65480
      03E65480 02157EC0 031FC1A0 00902170 00D831C0 00B42920 02EE3DB0 03992360 022AD960 029FDAE0 01D03790
      01D03790 03382C50 00A43A70 00F62740 008D34E0 02CBAE90 01AE79D0 03794530 02C5E7A0 00D38A30 025D2790
      025D2790 0173B450 03CA6E70 022F5940 0338F5E0 00A48F10 02F6C890 018DACD0 034B7AB0 02EEC7E0 02CCD200
      02CCD200 01D55D80 013FF340 01A00AE0 03700F90 00C80850 02AC0C70 03FA0A40 02070F60 010488D0 0386CCB0
      0386CCB0 0322D570 0159DFE0
     
