-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Sep 14 02:07:07 2024 UTC
-- File 20240809_205251_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-09T20:52:54.000.000.000 to 2024-08-09T20:52:54.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240809_205251_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  013EC0F0 01A1A080 017170C0 01C9C8A0 032D2CF0 02BBBA80 01F333E0 03855500 0123FFC0 02D90010 01B58010
      01B58010 036F4010 00D8E010 02B49010 01EED810 0319B410 00956E10 02DFD910 01B03590 03B417A0 00370E30
      00370E30 002C8920 023ACDB0 0327AB60 00B47ED0 02EE41B0 03996160 0055D1D0 027F3930 0340A5A0 00707BB0
      00707BB0 02242330 033632A0 00AD2BF0 00FBBE00 00866100 00C55180 00A7F940 00F405E0 028E0710 01C90490
      01C90490 0396C360 022ED160 0139B9D0 03A56530 0277D7A0 014C3C70 01EA2240 011F3360 0390AAD0 0058FFB0
      0058FFB0 00748060 03276020 005A6810 02775C10 014CF210 03EA8B10 001FCE90 021029D0 01183D30 019423A0
      019423A0 035E3270 02F12B40 03C4DF70 01135860 039AF450 00578E70 007C4940 00426DE0 02635B10 0152F690
      0152F690 03FB8DD0 00064B30 00056EA0 0103ECF0 00C10D40 00A18BE0 02F14E10 0189E910 034D1D90 00EB9350
      00EB9350 029E5AF0 03D17780 0239CC40 03252A60 025BDFA0 00BB1830 00E69420 0295DE30 03DF3120 0030A9B0
      0030A9B0 0028FD60 023C83D0
     
