-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Sep 13 04:36:35 2024 UTC
-- File 20240809_052718_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-09T05:27:21.000.000.000 to 2024-08-09T05:27:21.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240809_052718_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0320AAA0 00B0FFF0 00E88000 009CC000 00D2A000 00BBF000 00E60800 00950C00 00DF8A00 00B04F00 00743440
      00743440 02271730 03349CA0 00AED2F0 00F9BB80 00856640 00C7D560 02A43FD0 01F62030 010D3020 038BA830
      038BA830 03273E10 025A5080 037778C0 02CCC4A0 01AAA6F0 017FF580 01C00F40 012008E0 03B00C90 00680AD0
      00680AD0 025C0FB0 03B90430 0332C310 00ABA290 02FE73D0 01814A30 0141EF20 03E118B0 021194E0 01195E90
      01195E90 0395F1D0 005F0930 023846D0 009232D0 02DB2BB0 03B6BE60 006DE150 025B11F0 03769900 02CDD580
      02CDD580 03AB3F40 027EA0E0 0141F090 03F08460 02046320 010652B0 01857BE0 0347C610 00E42510 02963790
      02963790 01DD2C50 0333BA70 02AA6740 03FF54E0 02007F40 03802070 02403040 03602860 00D03C50 02B82270
      02B82270 03E43340 02162AE0 011D3F90 0393A050 005A7070 003BA420 01133B10 039AA690 0057F5D0 027C0F30
      027C0F30 034208A0 00E30CF0 00928A80 00DBCFC0 00B62820 02ED3C30 03CDD110 02159CC0 031F52A0 0090FBF0
      0090FBF0 00D88600 00B4C500
     
