-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Sep  8 02:45:42 2024 UTC
-- File 20240804_215323_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-04T21:53:26.000.000.000 to 2024-08-04T21:53:26.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240804_215323_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03B73FA0 006CA070 005AF040 00778860 024C4C50 016A6A70 01DF5F40 02987870 01EA2220 018F9990 03485550
      03485550 00EC7FF0 009A4000 00D76000 00BCD000 00E2B800 0093E400 00DA1600 00B71D00 007649C0 0226B690
      0226B690 0135EDD0 03AF1B30 027896A0 0144DDF0 01E6B300 0115EA80 019F1FC0 01509020 03F8D830 03025A10
      03025A10 0241BB80 03616640 02D1D560 01B93FD0 0365A030 02D77020 01BCC830 0162AC20 03D3FA30 023A0720
      023A0720 00938250 016D21B0 01DBB160 033669D0 00AD5D30 00FBF3A0 02860A70 03C50F40 022788E0 01344C90
      01344C90 03AE6AD0 003CAFD0 01117C10 0399C210 00552310 027FB290 01406BD0 03E05E30 02107120 011849B0
      011849B0 01946D60 035E5BD0 0078BB10 03227340 02B34AE0 01EAEF90 031F9850 00905470 00D87E40 00B44160
      00B44160 02EE61D0 01995130 0155F9A0 01FF82B0 028021F0 03C03100 02202980 03303D40 02A823E0 01FC3210
      01FC3210 03022B10 00833E90 02C2A1D0 01A3F130 02B904D0 00F2C350 028BA2F0 03CE7380 02294A40 033DEF60
      033DEF60 00A318D0 02F294B0
     
