-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Sep  8 02:13:42 2024 UTC
-- File 20240804_205003_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-04T20:50:06.000.000.000 to 2024-08-04T20:50:06.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240804_205003_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02A1CDB0 03F12B60 0009BED0 020D61B0 030BD160 008E39D0 01649290 03EB6DE0 020F6D80 01846DA0 01A32DB0
      01A32DB0 0172BB60 03CBE6D0 002E15B0 00391F60 022590D0 013758B0 01ACF4E0 037A8E90 00C7C9D0 01521690
      01521690 03FD8EE0 00034990 0202ED50 01039BF0 01825600 01437D00 01E2C380 0113A240 019A7360 03574AD0
      03574AD0 007E77D0 0120A610 03B0F510 00688F90 025CC850 0172AC70 01CBFA40 012E0760 03B904D0 006586B0
      006586B0 005745E0 033E7380 0150A520 03F8F7B0 02048C60 0106CA50 0385AF70 024778C0 0364C4A0 00D6A6F0
      00D6A6F0 00BDF580 00E30F40 02494470 01B6F320 036D8AB0 02DB4FE0 01B6E810 036D9C10 00DB5210 02B6FB10
      02B6FB10 01ED8690 031B45D0 0096E730 026ECA50 00ACD7B0 00FABC60 0287E250 01C41370 01261AC0 01B517A0
      01B517A0 036F9C70 02D85240 03B47B60 006E46D0 012CB2D0 01DD75D0 0333CF30 02AA28A0 01FF3CF0 0100A280
      0100A280 0180F3C0 01408A20 03E0CF30 0210A8A0 0118FCF0 00CA4140 0257B0F0 037C6880 02C25CC0 03A372A0
      03A372A0 0072CBF0 004BAE00
     
