-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Sep  8 01:51:05 2024 UTC
-- File 20240804_202150_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-08-04T20:21:53.000.000.000 to 2024-08-04T20:21:53.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240804_202150_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  021AB440 0317EE60 009C1950 02D215F0 01DD8F80 0099A420 016ABB10 03EFF340 02180AE0 01140F90 039E0850
      039E0850 00510C70 00798A40 00454F60 0267E8D0 01541CB0 01FE12E0 03808DC0 03206590 00B05750 02E87CF0
      02E87CF0 039C4280 025263C0 037B5220 00C6FB30 00A586A0 02F745F0 038CE700 01254A40 02DBF7B0 03B60C60
      03B60C60 006D0A50 025B8F70 037648C0 02CD6CA0 01ABDAF0 017E3780 01C12C40 0121BA60 03D8B3A0 001A7530
      001A7530 00174FA0 021CE870 03129C40 029BD260 01D63B50 033D26F0 02A3B580 03F26F40 020B58E0 02877A40
      02877A40 03E263B0 02135260 011AFB50 039786F0 025C4580 03726740 02CB54E0 01AEFE90 037981D0 00C54130
      00C54130 0253F0D0 00BD0450 02E38670 03924540 025B67E0 0176D410 03CDBE10 002B6110 023ED190 0121B950
      0121B950 03B165F0 0134EB80 00D74F20 02BCE8B0 03E29CE0 0013D290 021A3BD0 01172630 019CB520 0352EFB0
      0352EFB0 02FB9860 01865450 01A2BF30 02B9F050 01E50870 01178C40 019C4A60 03526F50 00FB58F0 0086F480
      0086F480 00C58EC0 00A749A0
     
