-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Aug  7 09:42:34 2024 UTC
-- File 20240713_035304_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-07-13T03:53:07.000.000.000 to 2024-07-13T03:53:07.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240713_035304_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  005D6B60 0273DED0 014A31B0 01EF2960 0318BDD0 0094E330 00DE92A0 02B1DBF0 03E93600 010ED680 00C4DEE0
      00C4DEE0 035358C0 02FAF4A0 01878EF0 01444980 01E66D40 01155BE0 039FF610 00500D10 02780B90 01440E50
      01440E50 01F304B0 02854370 03C7E2C0 022413A0 01361A70 01AD1740 017B9CE0 03C65290 00257BD0 0237C630
      0237C630 032C2520 005D1BD0 0139CB10 03A52E90 0077B9D0 024C6530 036A57A0 00DF7C70 00B0C240 00E8A360
      00E8A360 029CF2D0 01D28BB0 029DE730 03E98A50 001D4F70 0013E8C0 001A1CA0 021712F0 031C9B80 0292D640
      0292D640 03DBBD60 003663D0 022D5230 039DFD90 022981A0 013D4170 01A3E1C0 01721120 03CB19B0 022E9560
      022E9560 0139DFD0 03A53030 0277A820 014C7C30 02F52110 02C7D8C0 03A434A0 00762EF0 004D3980 006BA540
      006BA540 005E77E0 02714C10 0149EA10 03ED1F10 001B9090 030B2C60 02475D20 0164F3B0 01D68A60 033DCF50
      033DCF50 00A328F0 00F2BC80 008BE2C0 00CE13A0 02A91A70 03FD9740 0301AE70 0140BCA0 03E0E2F0 02109380
      02109380 0318DA40 0294B760
     
