-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Aug  6 00:46:14 2024 UTC
-- File 20240706_212352_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-07-06T21:23:55.000.000.000 to 2024-07-06T21:23:55.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240706_212352_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  032670B0 02B548E0 01EFEC90 03181AD0 009417B0 00DE1C60 02B11250 00F4CDB0 024755B0 03B27FB0 026B4060
      026B4060 015EE050 03F19070 02095840 030DF460 008B0E50 02CE8970 03A9CDC0 027D2B20 00A1DF50 01789870
      01789870 01C4D440 0126BE60 03B5E150 006F11F0 00589900 0074D580 004EBF40 0069E0E0 025D1090 02B9CC60
      02B9CC60 02F29520 018BDFB0 014E3060 03E92850 001DBC70 00136240 001AD360 0217BAD0 011C67B0 01925460
      01925460 03ADBF20 003DB050 02236870 0332DC40 02ABB260 01FE6B50 03015EF0 0281F180 03C10940 02218DE0
      02218DE0 01314B10 03D4F740 031F4670 0290E540 03D897E0 0034DC10 022EB210 0139EB10 03A51E90 007791D0
      007791D0 024C5930 036A75A0 006FA7B0 022C3A30 033A2720 00A734B0 00F4AEE0 028EF990 01C98550 032D47F0
      032D47F0 02BBE400 03E61600 02151D00 018FC9C0 02A41690 01F61DD0 030D1330 028B9AA0 01CE57F0 01297C00
      01297C00 01BDC200 01632300 01D2B280 013BEBC0 02D30F10 02DD4440 03B3E660 006A1550 025F1FF0 03709000
      03709000 02C8D800 03ACB400
     
