-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Aug  5 19:33:25 2024 UTC
-- File 20240626_094324_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-06-26T09:43:27.000.000.000 to 2024-06-26T09:43:27.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240626_094324_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  002E88D0 0239CCB0 03252AE0 00B7BF90 02EC6050 019A5070 01577840 02FE6230 03815320 0041FAB0 006107E0
      006107E0 02518410 01794610 03C5E510 00271790 02349C50 012ED270 00DCDDA0 015959B0 01F5F560 030F0FD0
      030F0FD0 00888830 00CCCC20 02AAAA30 03FFFF20 000000B0 000000E0 02000090 02800060 02E00020 01900030
      01900030 01580020 03F40030 020E0020 01090030 018D8020 034B4030 02EEE020 01999030 02AAAC10 02FFFD00
      02FFFD00 03800380 02400240 03600360 00D002D0 02B803B0 03E40260 00160350 021D02F0 03138380 014D2120
      014D2120 01F5D8D0 030F34B0 0288AEE0 01CCF990 032A8550 00BFC7F0 00E02400 00903600 00D82D00 00B43B80
      00B43B80 00771320 01264D50 03B56BF0 026FDE00 03583100 02F42980 038E3D40 024923E0 016DB210 03DB6B10
      03DB6B10 0036DE90 0316D8E0 024EDA40 0369B760 00DD6CD0 02B3DAB0 03EA37E0 001F2C10 0210BA10 0118E710
      0118E710 03949490 005EDED0 0138D8D0 01D25A50 033B7770 02A6CCC0 03F5AAA0 000F7FF0 0008C000 000CA000
      000CA000 000AF000 000F8800
     
