-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Aug  5 17:31:05 2024 UTC
-- File 20240622_173010_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-06-22T17:30:13.000.000.000 to 2024-06-22T17:30:13.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240622_173010_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00A722F0 00F4B380 008EEA40 00C99F60 02AD50D0 01FBF8B0 010604E0 03850690 004785D0 02644730 035664A0
      035664A0 007EAB70 0020FF60 023080D0 0128C0B0 01BCA0E0 0362F090 00D388D0 02BA4CB0 03E76AE0 0014DF90
      0014DF90 021EB050 0088F430 02664710 01556490 03FFD6D0 00003DB0 00002360 020032D0 01002BB0 01803E60
      01803E60 03402150 00E031F0 00481480 00360F60 022D08D0 013B8CB0 01A64AE0 03756F90 00CFD850 02A83470
      02A83470 03FC2E40 02023960 010325D0 01C15B90 0390FB20 005886B0 0074C5E0 024EA710 0169F490 03DD0ED0
      03DD0ED0 003389B0 002A4D60 023F6BD0 0120DE30 02D85890 02DA3A60 01B72750 036CB4F0 02DAEE80 03B799C0
      03B799C0 026C5520 015A7FB0 01F74060 030CE050 008A9070 0067EC20 012A0D10 03BF0B90 00608E50 0250C970
      0250C970 0378ADC0 02C4FB20 01A686B0 0175C5E0 03CF2710 0028B490 031E7760 0248A660 016CF550 03DA8FF0
      03DA8FF0 0237C800 032C2C00 02BA3A00 03E72700 0214B480 031EEEC0 029199A0 00ECAAB0 024D7FF0 036BC000
      036BC000 02DE2000 03B13000
     
