-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Aug  5 13:08:18 2024 UTC
-- File 20240614_170200_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-06-14T17:02:03.000.000.000 to 2024-06-14T17:02:03.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240614_170200_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  002F1FF0 00389000 00126C00 000DAD00 000B7B80 000EC640 0009A560 020D77D0 010BCC30 018E2A20 03493F30
      03493F30 02EDA0A0 019B70F0 00AB6440 027F6B30 0340DEA0 00E0B1F0 0090E900 00D89D80 00B4D340 00EEBAE0
      00EEBAE0 0299E790 01D51450 033F9E70 015028A0 01FC1E70 01021140 018319E0 03429510 00E3DF90 02923050
      02923050 01DB2870 0136BC40 01ADE260 037B1350 00634D70 002975E0 023DCF10 01232890 03B2BCD0 006BE2B0
      006BE2B0 005E13E0 02711A10 01499710 03ED5C90 001BF2D0 010B05D0 01C74390 0324E250 00B69370 00EDDAC0
      00EDDAC0 009B37A0 02D6AC70 03BDFA40 02630760 015284D0 03FBC6B0 030312F0 01414DC0 01E1EB20 03111EB0
      03111EB0 029991E0 01D55910 033FF590 00A00F50 02F008F0 03880C80 024C0AC0 03B507D0 0037C210 022C2310
      022C2310 013A3290 03A72BD0 0074BE30 004EE120 026991B0 035D5960 00F3F5D0 028A0F30 03E78450 000A2330
      000A2330 000F32A0 0208ABF0 030CFE00 028A8100 03CFC180 02282140 033C31E0 00A22910 02F33D90 02C551A0
      02C551A0 00D3FCB0 00BA02E0
     
