-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Jun  1 23:24:27 2024 UTC
-- File 20240601_191853_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-06-01T19:18:56.000.000.000 to 2024-06-01T19:18:56.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240601_191853_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  022AD210 013FBB10 03A06690 02382AE0 02921FC0 03ED8810 020DA600 030B7500 028ECF80 03C9A840 022D7C60
      022D7C60 013BC250 03A62370 027532C0 034FABA0 00E87E70 004E20A0 01349870 01AED440 0179BE60 03C56150
      03C56150 0027D1F0 00343900 002E2580 00393740 0025ACE0 02377A90 029663E0 02EEA900 0399FD80 02550340
      02550340 037F82E0 00C04390 02A06250 01F05370 01087AC0 018C47A0 034A6470 0177AB20 01E63F50 031520F0
      031520F0 029FB080 03D068C0 02385CA0 012472F0 01B64B80 016D6E40 01DBD960 033635D0 00569790 033EEE20
      033EEE20 00A19930 00F155A0 0289FF70 03CD00C0 022B80A0 013E40F0 01A16080 0171D0C0 01C938A0 0196D270
      0196D270 00AEDDA0 02F9B370 03856AC0 0247DFA0 01643070 01D62840 013D3C60 03A3A250 00727370 004B4AC0
      004B4AC0 023777D0 00966610 02DD5510 01B3FF90 036A0050 00DF0070 00B08040 00E8C060 029CA050 01D2F070
      01D2F070 013B8840 02D32630 03DD5A90 0033F7D0 022A0C30 033F0A20 00A08F30 00F0C8A0 0288ACF0 03CCFA80
      03CCFA80 022A87C0 033FC420
     
