-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri May 31 23:25:40 2024 UTC
-- File 20240531_202933_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-31T20:29:36.000.000.000 to 2024-05-31T20:29:36.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240531_202933_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  005F5CA0 0270F2F0 03488B80 02ECCE40 039AA960 022BFEE0 029F00C0 03E84050 001C6070 00125040 001B7860
      001B7860 0216C450 011DA670 01937540 015ACFE0 03F7A810 000C7C10 03052100 0143D8C0 01E234A0 03132EF0
      03132EF0 029AB980 03D7E540 023C17E0 01221C10 03B31210 006A9B10 025FD690 02B81EE0 02F208C0 038B0CA0
      038B0CA0 004E8AF0 0069CF80 005D2840 0073BC60 024A6250 016F5370 01D8FAC0 013487A0 01D76230 029E6990
      029E6990 01D15D50 0339F3F0 02A50A00 03F78F00 020C4880 030A6CC0 028F5AA0 01C8F7F0 012C8C00 00DD6500
      00DD6500 0059EBC0 00751E20 024F9130 036859A0 00DC7570 00B24FC0 00EB6820 029EDC30 03D1B220 00396B30
      00396B30 0212EF50 008DCC70 00CB2A40 00AEBF60 02F9E0D0 018510B0 014798E0 03E45490 00167ED0 021D41B0
      021D41B0 0313E160 024D08E0 02B5C640 03EF2560 0018B7D0 0214EC30 031E9A20 0091D730 00D93CA0 02B5A2F0
      02B5A2F0 03EF7380 0218CA40 038A57B0 0327BE30 02B46120 01EE51B0 01197960 0395C5D0 005F2730 0070B4A0
      0070B4A0 0248EEF0 036C9980
     
