-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri May 31 23:23:30 2024 UTC
-- File 20240531_184808_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-31T18:48:11.000.000.000 to 2024-05-31T18:48:11.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240531_184808_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0251A1A0 01797170 01C5C9C0 01272D20 03B4BBB0 026EE660 01599550 03F55FF0 020FF000 03080800 028C0C00
      028C0C00 03CA0A00 01178780 019C4440 01526660 03FB5550 0006FFF0 00058000 00074000 0004E000 00069000
      00069000 0005D800 00039A00 00012B80 0001BE40 00016160 0201D1D0 01013930 0181A5A0 03417770 02E1CCC0
      02E1CCC0 03912AA0 0059BFF0 003AB000 0013F400 001A0E00 00170900 001C8D80 0012CB40 001BAEE0 02167990
      02167990 011D4550 0393E7F0 025A1400 01BB8F00 00B32440 00EAB660 029FED50 01D01BF0 01381600 01A41D00
      01A41D00 01761380 01CD1A40 012B9760 03BE5CD0 0030B950 011472F0 019E4B80 01516E40 01F9D960 030535D0
      030535D0 0087AF30 00C478A0 02A644F0 03F56680 020FD5C0 03841F90 02230820 01328C30 01ABCA20 037E2F30
      037E2F30 02C138A0 01A1A4F0 01717680 01C9CDC0 012D2B20 03BBBEB0 033330F0 01555440 01FFFE60 03000150
      03000150 008001F0 00C00100 00A00180 00F00140 008801E0 02CC0110 01AA0190 03BF80A0 00302070 00283040
      00283040 003C2860 02223C50
     
