-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu May 30 23:16:09 2024 UTC
-- File 20240530_131213_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-30T13:12:16.000.000.000 to 2024-05-30T13:12:16.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240530_131213_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0229E4F0 033D1680 02A39DC0 03F92990 0202DEA0 0081D8F0 00C13480 00A1AEC0 00F179A0 0289C570 03CD27C0
      03CD27C0 022BB420 013E6E30 01A15920 0371F5B0 036487B0 036B6230 02DED320 01B1BAB0 016967E0 03DDD410
      03DDD410 00333E10 022AA110 013FF190 03A00950 00700DF0 00240580 001B03A0 02168270 031DC340 029322E0
      029322E0 01DAB390 0337EA50 00AC1F70 00FA10C0 008718A0 02C494F0 01D36F40 029D6C70 03D3DA40 023A3760
      023A3760 01272CD0 03B4BAB0 026EE7E0 01599410 03F55E10 000FF110 02080990 028606A0 00E282F0 0093C380
      0093C380 00DA2240 00B73360 02ECAAD0 019AFFB0 01578060 03FC4050 00026070 00035040 02017C30 0380E110
      0380E110 00409190 0260D950 0150B5F0 01F8EF00 01049880 0186D4C0 0145BEA0 03E761F0 0214D100 018F5CC0
      018F5CC0 02A47950 01F645F0 010D6700 018BD480 014E3EC0 01E921A0 031DB170 029369C0 03DADD20 0037B3B0
      0037B3B0 02163530 038E97D0 0049DC30 006D3220 025BAB30 03767EA0 00CD41F0 00ABE100 00FE1180 00811940
      00811940 00C195E0 0350AF80
     
