-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu May 30 23:10:59 2024 UTC
-- File 20240530_091528_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-30T09:15:31.000.000.000 to 2024-05-30T09:15:31.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240530_091528_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  018A8AC0 014FCFA0 03E82870 021C3C40 03122260 009B3350 02D6AAF0 03BDFF80 02630040 03528060 00FBC050
      00FBC050 02862070 03C53040 0313D430 034D1F10 00EB9090 029E58D0 01D174B0 0139CEE0 03A52990 0077BD50
      0077BD50 024C63F0 036A5200 02DF7B00 01D86340 029A2970 03D73DC0 023CA320 0122F2B0 01B38BE0 036A4E10
      036A4E10 00DF6910 02B0DD90 01E8B350 031CEAF0 01494FC0 02F6F410 018D8E10 034B4910 00EEED90 02999B50
      02999B50 01D556F0 013FFD80 01A00340 017002E0 03C80390 02160120 008E80D0 02C9C0B0 03AD20E0 007BB090
      007BB090 024668D0 01655CB0 01D7F2E0 033C0B90 00A20E50 02F30970 01C546E0 0393F2C0 025A0BA0 01770E70
      01770E70 01CC8940 012ACDE0 03BFAB10 00607E90 025041D0 01786130 01C451A0 01933CB0 02AD5170 03FBF9C0
      03FBF9C0 02060520 010507B0 01878460 03444650 00E66570 009557C0 00DFFC20 02B00230 03F40190 020700A0
      020700A0 010480F0 0186C080 0145A0C0 01E770A0 0314C8F0 029EAC80 03D1FAC0 023907A0 01258470 00DBA320
      00DBA320 015B3950 03F6A5F0
     
