-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed May 29 23:24:32 2024 UTC
-- File 20240529_191013_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-29T19:10:16.000.000.000 to 2024-05-29T19:10:16.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240529_191013_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03C4F330 02268AA0 0135CFF0 01AF2800 0178BC00 01C4E200 01269300 01B5DA80 016F37C0 01D8AC20 0334FA30
      0334FA30 02AE8720 01F9C4B0 02829370 01E1ED60 03111BD0 00999630 00D55D20 02BFF3B0 03E00A60 00100F50
      00100F50 021808F0 03140C80 029E0AC0 03E887D0 000E6210 02095310 010DFA90 038B07D0 004E8430 0069C620
      0069C620 025D2530 0373B7A0 00CA6C70 00AF5A40 027C7BB0 03A12330 0271B2A0 01496BF0 01EDDE00 011B3100
      011B3100 0196A980 015DFD40 01F303E0 030A8210 008FC310 03641140 036B0CF0 02DE8A80 03B1CFC0 02692820
      02692820 015DBC30 01F36220 030AD330 028FBAA0 01C867F0 012C5400 00DD3F00 0059D040 00753860 024FA450
      024FA450 01687670 01DC4D40 01326BE0 03AB5E10 007EF110 02418990 01614D50 01E8F5F0 008E4780 00C96440
      00C96440 00ADD660 02FB3D50 0186A3F0 0145F200 01E70B00 01148E80 019EC9C0 0151AD20 01FCBDD0 01817190
      01817190 0341C950 00E12DF0 0091BB00 00D96680 00B5D5C0 00EF3F20 0298A0B0 03D4F0E0 003E8890 0310E660
      0310E660 024C4AA0 016A6FF0
     
