-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed May 29 23:22:34 2024 UTC
-- File 20240529_174543_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-29T17:45:46.000.000.000 to 2024-05-29T17:45:46.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240529_174543_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00550BB0 007F8E60 02404950 00B036F0 007416C0 02270ED0 009A44D0 016BB350 03DE6AF0 02315F80 0329F040
      0329F040 02BD0860 01E38C50 03124A70 029B6F40 03D6D8E0 003DB490 0311B760 024CB660 016AED50 03DF9BF0
      03DF9BF0 02305600 03287D00 02BC4380 03E26240 02135360 011AFAD0 039787B0 032E2230 035C9990 00F2D550
      00F2D550 028BBFF0 03CE6000 02295000 033DF800 02A30400 03F28600 020BC500 030E2780 01449A20 01F36B90
      01F36B90 030ADE50 008FB170 00C869C0 00AC5D20 02FA73B0 03874A60 0044EF50 026698F0 0355D480 017F9F60
      017F9F60 03E02860 00103C50 02182270 03143340 029E2AE0 01D13F90 0339A050 00A57070 00F7C840 008C2C60
      008C2C60 03651D20 006BC9D0 025E2D30 03713BA0 00C9A670 00AD7540 00FBCFE0 02862810 01C53C10 0327A210
      0327A210 00B47310 03772540 03665BF0 02D57600 03BFCD00 02602B80 03503E40 02F82160 018431D0 03462930
      03462930 02E53DA0 0197A370 00AE3960 037C92E0 00C2DB90 02A3B650 01F26D70 010B5BC0 018EF620 03498D30
      03498D30 02ED4BA0 019BEE70
     
