-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed May 29 23:16:14 2024 UTC
-- File 20240529_124137_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-29T12:41:40.000.000.000 to 2024-05-29T12:41:40.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240529_124137_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01DFA000 00983800 006A1200 002F8D80 001C25A0 01091BB0 018D9660 034B5D50 00EEF3F0 00998A00 00D54F00
      00D54F00 00BFE880 00E01CC0 009012A0 02D81BF0 01DA0B00 009B8740 00D644E0 02BD6690 01E3D5D0 03123F30
      03123F30 029B20A0 01D6B0F0 013DE880 01A31CC0 017292A0 01E5EDF0 008B8D80 00CE4B40 00A96EE0 02FDD990
      02FDD990 01833550 0342AFF0 02E3F800 03920400 025B0600 03768500 0166E3C0 02EAC910 019FAD90 03507B50
      03507B50 00F846F0 00846580 00C65740 00A57CE0 02F7C290 018C23D0 034A3230 03779590 02662FA0 01553870
      01553870 01FFA440 01007660 03804D50 00406BF0 00605E00 00507100 00784980 00446D40 02332DF0 01955D80
      01955D80 015FF340 01F00AE0 03080F90 008C0850 02CA0C70 03AF0A40 02788F60 0144C8D0 03E6ACB0 030AFD70
      030AFD70 0147C1E0 03E42110 00163190 021D2950 0113BDF0 019A6300 01575280 01FCFBC0 01028620 0383C530
      0383C530 032113D0 0058CD10 0274AB90 014EFE50 03E98170 021D41C0 0313E120 009A11B0 00D71960 02BC95D0
      02BC95D0 01E2DF30 0289D850
     
