-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed May 29 23:09:54 2024 UTC
-- File 20240529_081057_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-29T08:11:00.000.000.000 to 2024-05-29T08:11:00.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240529_081057_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03826EA0 004359F0 0062F500 00538F80 007A4840 00476C60 0264DA50 0156B770 01FDECC0 01031AA0 038297F0
      038297F0 0121EE00 00D88C80 00B4CAC0 00EEAFA0 0299F870 03D50440 023F8660 01204550 03B067F0 02685400
      02685400 035C7E00 01792080 00E2D860 0293B450 01DA6E70 01375940 01ACF5E0 037A8F10 00C7C890 02A42CD0
      02A42CD0 01F63AB0 010D27E0 03C5DA00 01139B80 019A5640 01577D60 03FCC3D0 0002A230 0003F320 02020AB0
      02020AB0 03030FE0 00828810 02C3CC10 02D11500 01DCCFC0 0132A820 03ABFC30 027E0220 01410330 01E182A0
      01E182A0 031143F0 0299E200 03D51300 023F9A80 01902BE0 03AC1F00 027A1080 034718C0 02E494A0 0196DEF0
      0196DEF0 015DB180 01F36940 010ADDE0 038FB310 00486A90 03362FE0 02569C00 037DD200 02C33B00 03A2A680
      03A2A680 0273F5C0 034A0F20 00EF08B0 00988CE0 02D4CA90 01BEAFD0 01B0FC10 03B44100 026E6180 03595140
      03595140 02F5F9E0 018F0510 03488790 00ECC450 029AA670 03D7F540 023C0FE0 02910400 01ECC300 011AA280
      011AA280 0197F3C0 015C0A20
     
