-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed May 29 23:05:54 2024 UTC
-- File 20240529_052147_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-29T05:21:50.000.000.000 to 2024-05-29T05:21:50.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240529_052147_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01C4F9E0 03268510 00B5C790 02EF2450 0198B670 0154ED40 01FE9BE0 0301D610 02409E80 01B068E0 03685C90
      03685C90 00DC72D0 02B24BB0 03EB6E60 001ED950 0211B5F0 03196F00 0295D880 03DF34C0 03185750 004A3E70
      004A3E70 006F2140 0058B1E0 0274E910 014E9D90 03E9D350 001D3AF0 0013A780 001A7440 00174E60 030E74A0
      030E74A0 0044A770 0066F4C0 00558EA0 027F49F0 0340ED00 02E09B80 0390D640 0258BD60 0174E3D0 03CE9230
      03CE9230 0314ED90 024F4DA0 0168EB70 01DC9EC0 0132D1A0 03ABB970 027E65C0 03415720 00E1FCB0 009102E0
      009102E0 02D98390 02DAA120 00DBF8D0 02B604B0 03ED06E0 001B8590 02164750 011D64F0 0193D680 015A3DC0
      015A3DC0 01F72320 030CB2B0 034575F0 0173E780 01CA1440 012F1E60 03B89150 0064D9F0 0056B500 007DEF80
      007DEF80 00431840 00629460 0253DE50 00BD18B0 0271CA70 03492F40 02EDB8E0 019B6490 0356D6D0 00FDBDB0
      00FDBDB0 00836360 02C2D2D0 01A3BBB0 01726660 03E5AAA0 000BBFF0 000E6000 00095000 000DF800 000B0400
      000B0400 000E8600 0009C500
     
