-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri May 24 23:11:38 2024 UTC
-- File 20240524_093328_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-24T09:33:31.000.000.000 to 2024-05-24T09:33:31.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240524_093328_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01B873E0 03644A10 00D66F10 02BD5890 01E3F4D0 03120EB0 034D84F0 0175A340 02E7B970 039465C0 025E5720
      025E5720 01717CB0 01C9C2E0 032D2390 00BBB250 02E66B70 03955EC0 025FF1A0 00B804B0 02720370 034B02C0
      034B02C0 02EE83A0 0199C270 01552340 01FFB2E0 03006B90 00805E50 02C07170 03A049C0 03383690 025216E0
      025216E0 017B1D90 03C69350 0025DAF0 00373780 002CAC40 003AFA60 02278750 013444F0 01AE6680 00BCAAE0
      00BCAAE0 03717FC0 02C9C020 01AD2030 017BB020 03C66830 02255C20 0137F230 01AC0B20 037A0EB0 02C709E0
      02C709E0 02D24680 01DDB2E0 03336B90 00AADE50 02FFB170 038069C0 02405D20 016073B0 01D04A60 03386F50
      03386F50 00A458F0 007B3A40 022353B0 0332FA60 00AB8750 02FE44F0 03816680 0241D5C0 03613F20 00D1A0B0
      00D1A0B0 00B970E0 02E5C890 02CB9660 02D72EA0 01BCB9F0 0162E500 01D39780 013A5C40 01A77260 0374CB50
      0374CB50 00CEAEF0 00A9F980 00FD0540 0241C3F0 01B09100 0168D980 01DCB540 0132EFE0 03AB9810 007E5410
      007E5410 02417E10 0161C110
     
